1. Field of the Invention
This invention relates to a lead frame and particularly to a metal-core-type multi-layer lead frame, having at least one metal core plate hereinafter referred to as a core plate, which is used for a semiconductor device.
2. Description of the Related Art
A metal-core-type multi-layer lead frame is a product which is capable of mounting thereon a highly sophisticated semiconductor chip and capable of being applied to a multi-tip system. Using such a multi-layer lead frame including therein a metal core, thermal radiation from the highly integrated semiconductor chip and electrical characteristics can be improved and the number of pins available can be increased through a plurality of layers of the wiring patterns.
FIGS. 5(a) and 5(b) show a conventionally known metal-core-type multi-layer lead frame, in which metal cores are formed as a plurality of conductive layers. As shown in FIG. 5(a), the metal cores 5 are composed of a signal layer 7, a power supply layer 8 and a ground layer 9 laminated to each other by means of electrically insulated layers 6 arranged therebetween. A lead frame 10 is electrically connected to the signal layer 7, the power supply layer 8 and the ground layer 9, respectively, at the outer edge portion of the metal core 5.
In the above-mentioned prior art, since the signal layer 7 is the uppermost layer, in order to connect the lead frame 10 to the signal layer 7, a signal line 7a having a predetermined pattern is formed on the metal core 5, the signal line 7a is connected to the lead frame 10, as shown in FIG. 5(a), and the semiconductor chip 12 is connected to the single lines 7a, by a wire-bonding process, to electrically connect the semiconductor chip 12 to the lead frame 10.
On the other hand, in order to connect the inner, power supply layer 8 and ground layer 9 to the lead frame 10, as shown in FIG. 5(b), the metal core 5 is provided with via holes extending in the direction of the thickness thereof, and connecting portions 14 are formed on the upper surface of the metal core 5 to electrically connect with the power supply layer 8 and the ground layer 9 by a through-hole plating or the like. Also, bonding areas 8a and 9a which are electrically connected to the power supply layer 8 and the ground layer 9, respectively, are provided in the vicinity of the semiconductor chip 12. Thus, the lead frame 10 is connected to the connecting portions 14 and the bonding areas 8a and 9a and the semiconductor chip 12 are connected to the power supply layer 8 and the ground layer 9 by wire-bonding.
However, in the prior art as mentioned above, the metal core 5 must be provided with via holes so as to electrically connect the metal core 5 to the required conductive layers. It is difficult to form such via holes at accurate positions on the metal core 5 and also it is troublesome to form a structure such that the conductive layers of the metal core 5 are electrically connected to the lead frame.
In case of forming the via holes on the metal core 5, such holes are formed by machining with a drill or the like. However, there is a lower limitation of about 300 .mu.m in the diameter of such via holes. Therefore, it is almost impossible to form a very fine pattern, such as having leads pitched at about 150 .mu.m or less.
Thus, the conventional metal-core-type multi-layer lead frame has such problems that the manufacturing process thereof is relatively complicated, the cost for producing the same is relatively high, and the forming of very fine patterns is difficult.